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Thermal expansion testing measures the coefficient of thermal expansion (CTE) of silicon carbide (SiC) substrates and related ceramic substrates used in high-power semiconductor modules. Accurate CTE data from sub-zero temperatures up to several hundred degrees Celsius is essential for predicting solder fatigue, delamination, and substrate cracking in wide-bandgap power devices. This article explains the test samples, measured parameters, methods, standards, and applications involved in SiC substrate thermal expansion experiments.

Technical Overview

Silicon carbide (SiC), primarily in the 4H polytype, is the leading wide-bandgap semiconductor for power devices, offering a bandgap of approximately 3.26 eV, thermal conductivity of roughly 330-400 W/(m·K), and the ability to operate reliably at junction temperatures of 175 °C to 200 °C and beyond. These properties make SiC MOSFETs and Schottky diodes the preferred choice for electric vehicle traction inverters, photovoltaic inverters, and high-density industrial power converters.

Because SiC die are assembled into layered stacks consisting of the chip, solder or sintered silver layer, ceramic insulating substrate, and copper or composite baseplate, differences in dimensional change with temperature generate significant thermomechanical stress. The mean linear CTE of 4H-SiC is approximately 4.2-4.7 ppm/K (with slight anisotropy between the a-axis and c-axis), while copper expands at roughly 17 ppm/K and aluminum at approximately 23 ppm/K. This mismatch drives solder joint fatigue, wire bond lift-off, substrate cracking, and delamination during repeated power and temperature cycling. Thermal expansion experiments therefore serve three purposes: verifying material lot consistency, supplying accurate CTE curves for finite element simulation and lifetime modeling, and qualifying substrates against automotive and industrial reliability requirements such as AEC-Q101.

Testing Samples

Silicon Carbide Wafers and Free-Standing Substrates

Coupons are prepared from 100 mm, 150 mm, or 200 mm n-type conductive or semi-insulating 4H-SiC wafers, typically 350-500 µm thick. Rectangular specimens with a length of 2-10 mm for TMA or 20-25 mm for dilatometry are laser-diced or diamond-cut, with the two end faces ground and polished parallel to within approximately 10 µm. Because SiC is single-crystal and anisotropic, specimens are cut in defined crystallographic orientations so that expansion can be reported separately for the a-axis and c-axis directions.

Ceramic Insulating Substrates for SiC Power Modules

Direct-bonded copper (DBC) alumina, active-metal-brazed (AMB) aluminum nitride, and AMB silicon nitride substrates are tested both in bare ceramic form and with copper metallization attached. Bare ceramic coupons reveal the intrinsic CTE of the material, while metallized coupons capture the effective composite behavior that the SiC die actually experiences in an assembled module. Silicon nitride AMB substrates, with CTE values of roughly 2.8-3.4 ppm/K close to that of silicon and SiC, are of particular interest for high-reliability traction applications.

Assembled Stack-Ups and Baseplate Materials

For module-level evaluation, sintered or soldered die-on-substrate assemblies, substrate-to-baseplate stack-ups, and baseplate materials such as copper, aluminum silicon carbide (AlSiC), and other metal matrix composites are measured. Composite baseplates are anisotropic, so specimens are extracted and tested in the X, Y, and Z directions to fully characterize directional expansion behavior.

Testing Items

The core deliverables of a thermal expansion experiment on SiC-related substrates include:

  • Mean (secant) coefficient of thermal expansion over specified temperature intervals, reported in ppm/K or 10⁻⁶/K
  • Instantaneous (tangent) CTE as a continuous function of temperature
  • Complete expansion curves of relative length change (ΔL/L₀) versus temperature
  • CTE anisotropy for single-crystal SiC and composite baseplate materials
  • Expansion hysteresis and residual permanent strain after heating and cooling cycles
  • Effective CTE of copper-metallized AMB/DBC substrates compared with bare ceramic
  • Dimensional stability and post-cycling CTE drift after accelerated temperature cycling

Results are typically summarized in tabular form for standard engineering intervals such as 25 °C to 150 °C, 25 °C to 200 °C, and -55 °C to 250 °C, together with the full temperature-dependent expansion curve and a stated measurement uncertainty.

Testing Methods

Thermomechanical Analysis (TMA)

Thermomechanical analysis performed in accordance with ASTM E831 or ISO 11359-2 is the most common method for module-relevant temperature ranges, typically -100 °C to +600 °C. A low-force probe (commonly 10-30 mN) rests on the flat specimen face, and length change is recorded while the furnace ramps at 3-5 K/min under a nitrogen or argon purge to protect metallization from oxidation. Instruments are calibrated for temperature using melting-point standards and for expansion using certified reference materials such as sapphire or fused silica traceable to national metrology institutes.

Push-Rod Dilatometry

For high-temperature material characterization up to 1000 °C or beyond, horizontal or vertical push-rod dilatometers are used following ASTM E228 and, for fine ceramics, ISO 17562. Specimens of 20-25 mm length are placed against an alumina or fused silica system, and a correction run with a certified reference material removes the contribution of the apparatus expansion. Dilatometry offers excellent repeatability for rigid ceramics and is well suited to free-standing SiC substrate characterization and incoming material inspection.

Optical and Interferometric Techniques

Laser interferometric dilatometry, performed in accordance with ASTM E289, provides near-zero contact force and very high resolution, making it suitable for thin specimens and low-expansion materials. Full-field optical methods such as digital image correlation (DIC) with optical furnaces can map in-plane strain across entire metallized substrates or assembled stack-ups, revealing local expansion gradients at copper traces, ceramic windows, and brazed joints that a single-point probe cannot detect.

Combined Expansion and Reliability Testing

To correlate CTE data with real-world durability, expansion measurements are often combined with rapid change of temperature testing per IEC 60749-11 or JESD22-A104 temperature cycling (for example -55 °C to +150 °C or -40 °C to +175 °C) and power and temperature cycling per IEC 60749-34. Specimens are re-measured after defined cycle counts to track residual strain, CTE drift, delamination onset, and solder layer degradation, providing the inputs needed for Coffin-Manson-type solder fatigue lifetime models.

Applications

Thermal expansion test data for SiC substrates directly supports design, material selection, and qualification across the power electronics industry:

  • Electric and hybrid vehicle traction inverters, on-board chargers, and DC-DC converters
  • DC fast-charging infrastructure and battery energy storage systems
  • Photovoltaic string and central inverters, wind power converters, and smart-grid equipment
  • Railway traction converters and auxiliary power supplies
  • Industrial motor drives, servo systems, welding, and induction heating equipment
  • Aerospace and more-electric-aircraft power systems, high-altitude and high-temperature electronics
  • Data center power supplies and high-density server power delivery

Engineers use measured CTE curves as inputs to finite element thermomechanical simulation, solder joint lifetime prediction, die-attach and substrate material trade-off studies, supplier qualification, and statistical process control of incoming substrate lots. Testing is frequently conducted by ISO/IEC 17025-accredited third-party laboratories to support automotive qualification programs and independent design verification.

FAQ

What is the coefficient of thermal expansion of silicon carbide?

The mean linear CTE of 4H-SiC is approximately 4.2 ppm/K along the a-axis and 4.7 ppm/K along the c-axis near room temperature, rising gradually at elevated temperature. Typical engineering values fall in the range of 4.0-4.7 ppm/K over the intervals relevant to power module operation, and instantaneous CTE increases measurably with temperature, which is why full curves rather than single numbers are recommended for simulation work.

Which standards govern thermal expansion testing of SiC substrates?

Push-rod dilatometry is covered by ASTM E228 and ISO 17562, thermomechanical analysis by ASTM E831 and ISO 11359-2, and interferometric measurement by ASTM E289. Related reliability tests include IEC 60749-11 for rapid change of temperature, IEC 60749-34 for power and temperature cycling, and JESD22-A104 for temperature cycling.

What temperature range should the experiment cover?

For module-level evaluation, a range of -55 °C to +250 °C or +300 °C captures shipping, startup, and worst-case operating conditions. For material characterization of free-standing SiC or ceramic substrates, testing to 800 °C or 1000 °C may be specified to support sintering studies, brazing process development, and high-temperature packaging roadmaps targeting 250 °C junction temperature.

How many samples are required and how are they prepared?

Best practice is to test at least three specimens per material and per orientation. TMA coupons are typically 2-10 mm long with ground and polished parallel faces, while dilatometer specimens are generally 20-25 mm long. Thicknesses of 350-500 µm are typical for wafer-derived coupons, and all specimens must be clean, dry, and free of subsurface damage from dicing that could introduce creep or microcracking artifacts.

Can metallized AMB or DBC substrates be tested directly?

Yes. Measuring copper-metallized coupons yields the effective composite CTE that governs stress at the die-attach interface, which is often the value required for module simulation. It is good practice to test both bare ceramic and metallized samples so that the intrinsic ceramic behavior and the influence of copper pattern and thickness can be separated.

What measurement uncertainty can be expected?

With properly calibrated equipment and reference-material correction, dilatometry and TMA on rigid ceramics typically achieve CTE repeatability within a few percent, with expanded uncertainties on the order of 0.1-0.3 ppm/K at module-relevant temperatures. Reports from accredited third-party laboratories should include calibration traceability, heating rate, atmosphere, specimen orientation, and the uncertainty budget so results can be compared across lots and suppliers.